@includefrom superfx.asm
;CODE_05BB39 - Animation
;CODE_019211 - Sprite <-> Layer Interaction (EXTREMELY IMPORTANT)
;Note for above - The routine seems to reduce the toll taken on processing
;Actually makes stuff faster even!

pushpc
org $01CC28
	PHX
	REP #$20
	LDY.b #SpriteCode1_GSU>>16	;\
	LDA.w #SpriteCode1_GSU		;/This code will load the SuperFX code in ROM
	JSR $1E80
	PLX
	RTS

org $01A365
GetDrawInfoBnk1:
	REP #$20
	STX !R9
	LDY.b #GetDrawInfoBnk1_GSU>>16	;\
	LDA.w #GetDrawInfoBnk1_GSU		;/This code will load the SuperFX code in ROM
	JSR $1E80
	LDX !R9
	LDA $75C4,x				;\	This is a RAM related to off-screen...
	BNE	+					;/	If this isn't zero, pull A and return to new routine?
	LDY $75EA,x				;RAM_SprOAMIndex   ; Y = Index into sprite OAM
	RTS
+	PLA	;\	I don't understand much, from what I know...
	PLA	; | This pulls A two times and returns to original routine.
	RTS	;/	Without OAM Index. This saves a BIT of time, the original didn't had this.
pullpc

arch superfx
SpriteCode1_GSU:
CACHE		; Put code in C-RAM
IBT R1,#$00	;\ Set up variables
IBT R2,#$04	;/

TO R3		;\  Set Multiplicands and Multipliers
LDW (R1)	; |
INC R1		; |
INC R1		; |
TO R4		; |
LDW (R1)	;/

FROM R3		;\ Do Unsigned Multiplication
UMULT R4	;/
STW (R2)	; Save Product

INC R1		;\  Set Multiplicands and Multipliers
TO R5		; |
LDW (R1)	;/

FROM R3		;\ Do Signed Multiplication
MULT R5		;/

INC R2		;\  Save Product (on register)
TO R6		; |
LDW (R2)	; |
WITH R6		; |
ADD R0		;/

WITH R1		;\  Set Multiplicands and Multipliers
ROR			; |
TO R3		; |
LDW (R1)	;/

FROM R3		;\ Do Signed Multiplication
MULT R4		;/

FROM R6		;\  Save Product (for real)
ADD R0		; |
STB (R2)	;/

FROM R3		;\ Multiplicands and Multipliers already set...
MULT R5		;/ Multiply directly!

INC R2		;\ Store Product
STB (R2)	;/
STOP

GetDrawInfoBnk1_GSU:
base $0000
WITH R9	;\ This operation fixes the index value
LOB		;/ R9 & 00FF = R9

IBT R0,#$01	;\ Set the ROM Bank value
ROMB		;/ Now, every GETB operations will be at bank $01

SUB R0			;\  STZ $186C,x
IWT R1,#$186C	; | Despite GSU routine looking wasteful
WITH R1			; | Don't be fooled by that
ADD R9			; | RISC Processors means that the programmer
STB (R1)		;/  Should do the best with what they got

IWT R1,#$15A0	;\  STZ $15A0,x
WITH R1			; |
ADD R9			; |
STB (R1)		;/

MOVE R11,R0		; Copy data from R0 to R11
MOVE R8,R1		; Copy address from R1 to R8

IWT R4,#$14E0	;\	LDA $14E0,x
WITH R4			; | Why I did here?
ADD R9			;/	The CMP below may get wrong results

IWT R1,#$E4		;\  LDA $E4,x
WITH R1			; | You see these WITH : ADD?
ADD R9			; | They are basically making indexes for the addresses
LDB (R1)		;/  Super FX doesn't have indexes

MOVE R7,R0		; Copy data from R0 to R7

IBT R1,#$1A		;\  CMP $1A
TO R2			; | The code is doing R0-R2 = Set flags
LDB (R1)		; | Also, you might be confused but it takes time...
CMP R2			;/  All operations are natively 16-bit

LDB (R4)		; LDA $14E0,x - Note: Refrain using R3, it is our stack pointer!
MOVE R6,R0		; Copy data from R0 to R6

INC R1			;\  SBC $1B
TO R4			; | R1 was #$1A, all we did was to increment it to 1 so it turned #$1B
LDB (R1)		; | Then we loaded it, subtracted it and we got good to go
SBC R4			;/
BEQ CODE_01A379	; Branch if Z flag is set

INC R11			;\  INC $15A0,x
FROM R11		; | Remember the copy operation above?
STB (R8)		;/	It came handy now

CODE_01A379:
MOVE R10,R2		; Copy data from R2 to R10
FROM R6			; LDA $14E0,x
SWAP			; XBA - R0 contains the value now
ADD R7			; LDA $E4,x - I merged both values using an ADD
LMS	R2,($1A/2)	; REP #$20 : SEC : SBC $1A
SUB R2			; Unlike SNES, SUB don't count with Borrow Flag
IBT R4,#$40		;\  CLC : ADC #$0040 : CMP #$0180
ADD R4			; | R0 + R4 = R0
IWT R4,#$0180	;/  R4 = #$0180
IWT R1,#$15C4	;\  STA $15C4,x - Preemptively code
WITH R1			; | Once again, avoided using the "indexing" before the CMP
ADD R9			; | To avoid issues with Carry Flag
CMP R4			; | R0 - R4 = Set flags
ROL				; | <ROL>
AND #1			; | <AND #$01>
ALT1			; | INVALID will be always a STOP. Store/ALT operations affects nothing.
BNE INVALID		; |<> (Use a trick to get out a NOP)
STW (R1)		;/  But this is needed, basically a sanity check. - ALT1 + STW = STB


IBT R12,#$01	; LDY #$00 - LOOP opcode subtracts first then check later, this is a sanity check...
IBT R1,#$09		;\  LDA $14C8,x : CMP #$09
IBT R2,#$20		; |
IWT R4,#$14C8	; |
WITH R4			; |
ADD R9			; |
LDB (R4)		; |
CMP R1			;/
BEQ CODE_01A3A6	; Branch if Sprite Status = Stunned
CACHE			;

IWT R4,#$190F	;\  LDA $190F,x : AND #$20
WITH R4			; |
ADD R9			; |
LDB (R4)		; |
AND R2			;/
BEQ CODE_01A3A6	; Branch if "Death frame 2 tiles high" isn't set
CACHE			; In both cases, the cache loading will already happen

INC R12			;\ INY - If LOOP instruction is executed more than one time
CODE_01A3A6:	; | (Each branch contains CACHE RAM opcode. Don't waste with NOPs.)
MOVE R13,R15	;/ Run data from CACHE rather than ROM/SRAM

IBT R2,#$00		;\ Zero Registers
IBT R4,#$00		;/ R4 is our temporary flag backup

IWT R11,#$14D4	;\	LDA $14D4,x
WITH R11		; | Preemptively load this address on register
ADD R9			;/  Remember CMP values

IWT R1,#$D8		;\  LDA $D8,x
WITH R1			; |
ADD R9			; |
LDB (R1)		;/
MOVE R5,R0		; Load R0 data on Temporary register R5
SEX				; Make able to have corrected result using extended sign bit
IWT R14,#$A360	;\	CLC : ADC DATA_01A361,y
WITH R14		; |
ADD R12			; |
TO R1			; |
GETBS			; |
ADD R1			;/

WITH R4			;\ PHP
ROL				;/

IBT R1,#$1C		;\	CMP $1C
TO R8			; |
LDB (R1)		; | Load data to R8 and compare right away
CMP R8			;/
TO R6			;\	ROL $00
LDB (R2)		; |
WITH R6			; |
ROL				;/

WITH R4			;\ PLP
ROR				;/

LDB (R11)		;\  LDA $14D4,x : ADC #$00 : LSR $00 : SBC $1D
ADC #0			; |
WITH R6			; |
LSR				; |
FROM R6			; |
STB (R2)		; |
INC R1			; |
WITH R4			; |
LDB (R1)		; |
SBC R4			;/
BEQ CODE_01A3C6

INC R14			;\	Fix ROM address
INC R14			; |
IWT R1,#$186C	; |	LDA $186C,x : ORA DATA_01A363,y : STA $186C,x
WITH R1			; |
ADD R9			; |
LDW (R1)		; |
TO R2			; |
GETB			; |
OR R2			; |
STB (R1)		;/

CODE_01A3C6:
LOOP			; Go back!

FROM R7			;\	LDA $E4,x : SUB $1A : STA $00
SUB R10			; |
STB (R2)		;/

FROM R5			;\	LDA $D8,x : SUB $1C : STA $01
SUB R8			; |
INC R2			; |
STB (R2)		;/

INVALID:
STOP
base off
arch 65816